IEEE Journal on Selected Areas in Communications
IEEE JOURNAL ON
SELECTED AREAS IN COMMUNICATIONS
January 1986, Volume SAC-4, Number 1
VLSI IN COMMUNICATIONS II
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Guest Editors -- P. McLane, M. Belanger, E. Y. Ho, and M. Kawashima
Guest Editorial
P. McLane, M. Belanger, E. Y. Ho, and M. Kawashima
PAPERS
- Design Examples of System Partitioning and Performance Allocation
for VLSI Implementation
- B. P. Agrawal and N. Janakiraman
- A Theory for the Design of Soft-Error-Tolerant VLSI Circuits
- Y. Savaria, J. F. Hayes, N. C. Rumin, and V. K. Agarwal
- High-Speed Si -- Bipolar and GaAs Technologies
- K. Worner and A. Colquhoun
- High-Speed Time Switch Using GaAs LSI Technology
- Y. Shimazu and T. Takada
- Design and VLSI Implementation of a Concurrent Solver for N-Coupled Least-Squares
Fitting Problems
- F. A. Deprettere and K. Jainandunsing
- A Discrete Fourier-Cosine Transform Chip
- M. Vetterli and A. Lightenberg
- A Fast VLSI Multiplier for GF(2m)
- P. A. Scott, S. E. Tavares, and L. E. Peppard
- RNS Digital Filtering Structures for Wafer-Scale Integration
- B. W. LaMacchia and G. R. Redinbo
- A Custom VLSI Chip Set for Digital Signal Processing in High-Speed
Voice-Band Modems
- S. U. H. Qureshi and H. M. Ahmed
- VLSI Architectures for the Finite Impulse Response Filter
- K. H. Cheng and S. Sahni
- A Versatile Spectrum Modification Technique
- R. J. Cosentino and S. J. Meehan
- Application of a VLSI Vector Quantization Processor to Real-Time
Speech Coding
- G. Davidson and A. Gersho
- Implementation of 32 kbit/s ADPCM Codec Using a General-Purpose Digital
Signal Processor
- T. Matsumura, H. Gambe, and K. Murano
- Study on Pulse-Search Algorithms for Multipulse Excited Speech Coder Realization
- K. Ozawa, S. Ono, and T. Araseki
- VLSI Structures for Viterbi Receivers: Part I -- General Theory and Applications
- P. G. Gulak and E. Shwedyk
- VLSI Structures for Viterbi Receivers: Part II -- Encoded MSK Modulation
- P. G. Gulak and E. Shwedyk
- Implementation of a Viterbi Processor for a Digital Communications System with
a Time-Dispersive Channel
- N. J. P. Frenette, P. J. McLane, L. E. Peppard, and F. Cotter
- Fast Error Decoding with Binary VLSI Logic
- D. M. Mandelbaum
- A Line-Termination Circuit for Burst-Mode Digital Subscriber Loop Transmission
- T. Chujo, N. Ueno, A. Takada, Y. Hino, and M. Fukuda
- 400 Mbit/s Optical Regenerator Integrated Circuits
- K. Yamaguchi, H. Kitasagami, M. Motegi, F. Ogawa, H. Nishimoto,
H. Iwamoto, and M. Kodako
- 32-Bit Custom VLSI Processor for Communications Network Nodes
- A. Niwa and T. Yamada